1. Field of the Invention
The present invention relates to a method of reducing spurious signals caused by the power consumption of processors, particularly digital signal processors, which power consumption is dependent on the instruction code being executed.
2. Description of the Related Art
Processors often perform cyclically recurring program routines which are initiated by interrupts. During the run time of such routines, which run time is shorter than the time between two successive interrupts, a first mean power consumption may result. The ohmic resistance or inductive reactance of supply voltage leads causes voltage drops which are dependent on the power consumption of the components or units connected thereto, This may result in superimposed spurious voltages at the supply voltage terminals of the components or units. Inductive or capacitive coupling may cause crosstalk from the supply voltage leads to signal inputs, particularly of analog subcircuits.
In assemblies with digital signal processing, one such unwanted signal source is the digital signal processor, which contains units with different power consumptions, such as an adder, a subtracter, a multiplier, an accumulator (ACCU), a RAM, and a data bus interface. If such a digital signal processor performs cyclically recurring program routines, the latter will result in a mean power consumption of the signal processor which is determined by the frequency and type of the instruction code used. Such cyclically recurring program routines occur, for example, during the digital processing of audio .signals, which involves writing in digitized input values at a predetermined repetition rate, processing these values by program routines, such as, for example, filter functions, and subsequently outputting the changed values. The run time of these program routines must be chosen to be shorter than the time between two input values to be processed, because otherwise erroneous results may be produced.
For the time between the end of a program routine and the next input value to be processed, which may be signalled by an interrupt, for example, the signal processor either is placed in a specific, generally particularly current-saving, wait state (i e., "WAIT" instruction code) or it remains in an endless loop, which can be left if an interrupt occurs.
Due to this constant change between the execution of a program routine, during which, as a rule, all internal units of the signal processor are activated, and a wait state with low power consumption, the signal processor causes not only spurious signals in a frequency range determined by its instruction execution time, but also spurious signals resulting from this change.
Thus, besides the spurious signals at a frequency which is dependent on the instruction execution time and, as a rule, lies far above the useful signal to be processed, at least one further spurious signal is generated whose amplitude and frequency are dependent on the constant change between program routine and wait state, and whose signal spectrum can lie within the frequency range of the useful signal or in the vicinity of this frequency range.
If coupling exists between the signal processor and the analog subcircuits, even small spurious signals which occur on the supply voltage, which serves as a reference potential for the analog signals to be processed, or which are coupled to signal inputs by inductive or capacitive crosstalk, will have a disturbing effect.
Independently of the implementation of a unit on a printed circuit board or in an integrated circuit, particular conductor routings for the reference potential with respect to a common reference point are only possible to a limited extent. A symmetrical analog signal which is free from a reference potential needs additional connection points and lines.
It is, therefore, the object of the invention to provide a method whereby the spurious signals caused by the cyclic operation of the processor can be reduced.